Stress-induced Degradations and Self-heating Effects in P-channel Power VDMOS Transistors

XVII International Conference on Systems, Automatic Control and Measurements, SAUM 2024 (pp. 125-128)

АУТОР(И) / AUTHOR(S): Sandra Veljković , Nikola Mitrović , Miloš Marjanović , Emilija Živanović , Vojkan Davidović , Goran Ristić , Danijel Danković 

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DOI:  10.46793/SAUM24.125V

САЖЕТАК / ABSTRACT:

This study investigates the reliability and performance of p-channel power VDMOS transistors subjected to different stresses NBT, PBT, HEF, and irradiation. Results reveal distinct degradation patterns in electrical parameters, with threshold voltage shifts particularly affected. Notably, positive HEF stress can produce a „turn-around“ effect in investigated devices. Also, irradiated devices show degradation trends similar to those under HEF stress, emphasizing the influence of ionizing radiation on stability. Additionally, self-heating effects in stressed devices highlight vulnerability under real operating conditions. These findings are crucial for enhancing the reliability of VDMOS transistors in high-stakes applications such as automotive, aerospace, and high-reliability switching circuits.

КЉУЧНЕ РЕЧИ / KEYWORDS:

VDMOS transistors, NBT stress, PBT stress, irradiation, self-heating effects, normal operation conditions

ПРОЈЕКАТ / ACKNOWLEDGEMENT:

Part of the results are obtained through the project SPS G5974 – „High-k Dielectric RADFET for Detection of RN Treats“. This work was also supported by the Serbian Ministry of Science, Technological Development and Innovation [grant number 451-03-65/2024-03/200102].

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